Computer Science 2500 Computer Organization Rensselaer Polytechnic Institute Spring 2009

This week's task is to design a memory interface for a very small computer. You will use as building blocks a number of gates and circuits which are readily available to someone interested in constucting the actual circuit.

We will assume an implementation environment with 8 input lines from the "outside world" that can each carry a 0 or a 1, 2 pushbuttons that produce the value 1 when pressed, 0 otherwise, and 8 output lines that can be sampled for values. In a real computer, we would connect these input and output lines to other components, but for our purposes, we can think of the inputs simply as switches, and the outputs as being connected to lights that are on when a value of 1 is being produced, off otherwise.

We will label our switches SW0, SW1, ..., SW7, our pushbuttons A and B, and our outputs LED0, LED1, ..., LED7.

Your implementation should include the following units:

• A 256 nibble memory. Use a 2114 1024x4 bit memory chip (leaving (3)/(4) of the nibbles unused) for your memory. The 2114 is a memory device that has 10 address line inputs (A9, A8, ..., A0), 4 bidirectional data lines (D3, D2, D1, and D0), a an active-low chip select (CS), an an active low write enable (WE). Historical note: the 2114 was used to store high scores for some video game systems during the 1980's.
• The MAR (memory address register). This register drives the address bus. You may use a collection of D-type flip-flops (treat them as a unit for simplicity in your diagram).
• The MBR (memory buffer register). This register reads values from and writes values to the data bus.

When completed, the entire circuit should have the following capabilities and behaviors:

1. Loading the MAR. When the A pushbutton is pressed, the value represented by the 8 data switches (SW7-SW0) is loaded into the MAR.
2. Loading a value from "the outside world" (from the CPU in a real system) into the MBR. Data can be loaded into the MBR using the rightmost 4 data switches (SW3-SW0) by setting the leftmost 2 data switches (SW7 and SW6) low and pressing the B pushbutton. The other two switches are ignored.
3. Storing the value in the MBR into memory. The data contained in the MBR can be stored into the memory location indicated by the MAR by setting SW7 to 1 and SW6 to 0 and pressing the B pushbutton.
4. Retrieving a value from memory into the MBR. The data contained in memory at the address indicated by MAR can be stored in the MBR by setting SW7 to 1, SW6 to 1 and pressing the B pushbutton. You can think of SW7 as enabling a read/write between the MBR and memory (CS from our class discussions), with that SW6 controlling the direction of the data flow (RD/(not)WRT, or who's "driving" the data bus).
5. 4 outputs (LED3-LED0) should be configured to display the contents of the MBR at all times--even when the MBR is not driving the data bus. The other outputs (LED7-LED4) should be configured to display the contents of the data bus at all times.

You may use any of the gates and circuits we have discussed in class as your building blocks.

Please provide detailed labels of the components of your circuit. Be sure we can easily pick out the 2114, the registers, the data bus, any important control lines, etc. If you hand-draw your circuit, you should probably re-draw once you are happy with your design.

You may either submit a hard copy of your circuit design to my mailbox in Lally 207 on or before the due date, or you may submit a PDF file containing your circuit design through the usual submission system on the RPI CS Lab systems. Late submissions will be accepted subject to the usual penalty rules. Late hard copy submissions should be timestampped and signed and placed in my mailbox in Lally 207.