Computer Science 2500 Computer Organization Rensselaer Polytechnic Institute Spring 2009

Agenda

• Announcements
• Final exam information
  • cumulative, but focus on topics since exam 2
    • datapaths and control
    • pipelining
    • memory hierarchy
    • ISA comparisons
    • parallelism
  • will revisit the topics that gave the most trouble on previous exams
  • same ground rules as our in-class exams
  • last day of class will include time to ask review questions
  • I am out of town from the last day of class until the day before the exam
  • I plan to be on campus all day before our exam on May 4 at 3 PM
• Course evaluations
• Lab 8 continues
• ISA comparison wrapup
  • x86/IA-32 basics - much more in this lecture's shared area
• Parallelism
  • Instruction-level parallelism

Lecture Assignment

This, your last lecture assignment, is due at the start of class, Friday, April 24.

Please turn in a hard copy answer to Exercise 2.38, parts 1b, 2b, and 3b, only. We will discuss these during class, so no late submissions are accepted. The problem is reproduced here for the benefit of those working without the text.

The x86 instruction set includes the REP prefix that causes the instruction to be repeated a given number of times or until a condition is satisfied. The first three problems (the three you are to do) refer to the following x86 instruction:

b. REP MOVSD, which does the following:

Repeat until ECX is zero:
Mem32[EDI]=Mem32[ESI], EDI=EDI+4, ESI=ESI+4, ECX=ECX-1

2.38.1. What would be a typical use for this instruction?

2.38.2. Write MIPS code that performs the same operation, assuming that $a0 corresponds to ECX, $a1 to EDI, $a2 to ESI, and $a3 to EAX.

2.38.3. If the x86 instruction takes one cycle to read memory, one cycle to write memory, and one cycle for each register update, and if MIPS takes one cycle per instruction, what is the speed-up of using this x86 instruction instead of the equivalent MIPS code when ECX is very large? Assume that the clock cycle time for x86 and MIPS is the same.